Job Description
Job DescriptionJob Title: Sr FPGA Engineer
Location: El Segundo, CA or Cedar Rapids, IA
Pay Range: $85.00/hour (CA) / $75.00/hour (IA)
Job Description:
Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs.
Responsibilities:
• Adhere to all applicable Engineering Development and Quality processes, procedures, instructions and guidelines.
• Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
• Requirements, design and verification of FPGA solutions
• Integration of developed FPGA on target hardware units
• Supporting peer reviews and certification analysis activities
• Peer reviewing FPGA development artifacts
• Management of change request and task assignments through Jira
Required Qualifications:
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.
A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
• Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
• Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
• Strong debugging and troubleshooting skills for FPGA/ASIC systems.
• Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Preferred
• Excellent communication and teamwork skills with the ability to work in a collaborative environment.
• Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).
• Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
• Experience in ASIC / FPGA lab validation using advanced laboratory equipment
• Experience with Unix, scripting, C/C++, and/or Perl
Military experience equivalency may substitute for some requirements.
***For consideration for this opportunity, please email your resume to info@uspro.net and include in your message the job title AND five-digit number that follows the job title***
Equal Opportunity Statement:
USPRO is an equal opportunity employer and will consider all applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran, disability and/or other protected categories. We are also committed to providing reasonable accommodation(s) to qualified individuals with disabilities or needs, as required by law.