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Thermo-Mech CFD Simulation Intern

Etched
locationSan Jose, CA, USA
PublishedPublished: 6/14/2022
Manufacturing
Full Time

Job Description

Job Description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are seeking a talented Thermo-Mechanical, CFD Simulation Engineering Intern focused on Chip-on-Wafer-on-Substrate (CoWoS) package development to join our Advanced IC Packaging Team in Fall '26, Spring '27, or Summer '27. You'll use tools like ANSYS Mechanical APDL and ANSYS FLUENT to perform critical thermo-mechanical/CFD analysis and contribute to next-generation high-performance computing systems.

Key responsibilities

  • Develop FEA models for CoWoS-based IC packages using ANSYS Mechanical APDL

  • Perform thermo-mechanical stress/strain analysis and thermal cycling simulations

  • Analyze package warpage, solder joint reliability, and interconnect stress

  • Develop CFD models using ANSYS FLUENT for solder reflow modeling

  • Collaborate with design engineering teams on package development

You may be a good fit if you have

  • Education & Experience

    • Pursuing a degree in Mechanical Engineering or related field

    • Academic or project experience with FEA/CFD tools and analysis

  • Technical Skills

    • Proficiency in SOLIDWORKS/NX, ANSYS Mechanical APDL and ANSYS FLUENT

    • Understanding of semiconductor packaging materials and processes

    • Strong grasp on non-linear properties of materials (elastic-plastic, viscoelastic)

    • Familiarity with CoWoS-S/L/R, TSVs, or 2.5D/3D integration concepts

    • Basic programming/scripting skills (APDL, Python, MATLAB)

Strong candidates may have some experience with

  • Knowledge of solder joint reliability and failure analysis

  • Familiarity with JEDEC standards and reliability testing

  • Previous internship in semiconductor industry

We encourage you to apply even if you do not believe you meet every qualification.

Program details

  • 12-week paid internship

  • Generous housing support for those relocating

  • Daily lunch and dinner in our office

  • Based at our office in San Jose, CA

  • Direct mentorship from industry leaders and world-class engineers

  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com.

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

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