Job Description
Title: Physical Design Engineer
Location: San Jose CA,
Might consider Remote or Hybrid for stellar candidate
What You will Do:
Perform physical design of 2nm/3nm/5nm mutli-GHz IP for network switch products. Be able to come up with floorplan, powerplan, cts and routing of the design using state-of-art EDA tools like Innovus. Work closely with designers and must be able to write TCL script to perform custom/semi-custom standard cells placements/clock tree adjustments/routing to achieve design specs (STA/IR/EM/LVS/DRC). Good timing analysis and CTS knowledge is required.
What You Will Bring:
- MSEE/MSCS 6+ years
- Expertise in Cadence Innovus/Atop physical design tools
- Experience on Calibre LVS/DRC
- Low power, signal integrity experience
- Work closely with RTL & DFT designers
- Strong TCL/Python scripting knowledge required, Perl is a plus.
- Good debug skill and be able to work around issues
- Tape out experience
- must be a good team player