Job Description
Job Description
At-a-Glance:
Are you ready to build your career by joining a leading global provider of product engineering and semiconductor design services? If so, our client is hiring a Timing Constraints Engineer.
Position Type:
- Contract
- On-Site
Required:
- 8+ years’ experience.
- Bachelor’s degree.
- Experience with Timing Constraint writing, validation, Static timing Analysis and RTL Synthesis.
- 8 - 12 years of hands-on RTL S.
- EDA exposure: Design compiler, PrimeTime and Spyglass.
- Multi-Node Design: Experience working with 16nm, 7nm... etc nodes.
Responsibilities:
- RTL Synthesis, Constraint writing, validation, Static timing Analysis.
- Writing Scripts/Modifying scripts for RTL synthesis, SDC creation, STA.
- Debug synthesis issues and STA.
- Generate clean netlist.