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Physical Design Engineer

PublishedPublished: 6/14/2022
Construction
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Job Description

KEY RESPONSIBILITIES:

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  • Perform physical implementation of complex ASICs, SoCs, and IP blocks from synthesis through final tapeout.
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  • Execute floorplanning, power planning, placement, clock tree synthesis (CTS), and routing.
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  • Drive timing closure through setup/hold optimization, timing analysis, and ECO implementation.
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  • Perform Static Timing Analysis (STA) across multiple modes and corners (MMMC).
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  • Analyze and optimize power, performance, and area (PPA) tradeoffs.
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  • Conduct signal integrity, crosstalk, and parasitic analysis.
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  • Support EM/IR analysis, physical verification, and design signoff activities.
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  • Implement low-power design methodologies and UPF-based power domain strategies.
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  • Develop and enhance physical design methodologies and automation scripts.
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  • Collaborate with RTL, DFT, verification, CAD, and architecture teams to resolve implementation challenges.
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  • Debug physical design issues and drive design optimization throughout the implementation cycle.
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PREFERRED EXPERIENCE:

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  • 4+ years of experience in ASIC design, physical implementation, or related semiconductor engineering.
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  • Strong hands-on experience with digital ASIC Physical Design methodologies.
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  • Expertise in floorplanning, placement, CTS, routing, and timing closure.
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  • Experience with Cadence Innovus and/or Synopsys Fusion Compiler / ICC2.
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  • Strong Static Timing Analysis (STA) experience using Synopsys PrimeTime.
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  • Knowledge of MMMC implementation methodologies and advanced process nodes.
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  • Experience with signal integrity, crosstalk, RC extraction, and EM/IR analysis.
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  • Understanding of ECO implementation and formal verification.
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  • Experience with low-power implementation techniques and UPF methodologies.
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  • Programming and scripting experience using Python, Tcl, Perl, or Shell.
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  • Strong analytical, debugging, and problem-solving skills.
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📍 Location: Austin, TX, Santa Clara, CA, San Diego, CA

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📅 Duration: 12+ Months Contract (Possible Extension)

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EEO:

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“Mindlance is an Equal Opportunity Employer and does not discriminate in employment on the basis of – Minority/Gender/Disability/Religion/LGBTQI/Age/Veterans.”

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