Job Description
- \n
- 10+ years of semiconductor/SoC design or emulation experience
- Expertise with Siemens Veloce (preferred), or Cadence Palladium or Synopsys ZeBu
- Experience with FPGA prototyping (HAPS, Protium, or proFPGA)
- Strong knowledge of RTL (Verilog/SystemVerilog) and SoC architecture
- Hands-on experience with PCIe, UCIe, LPDDR, and HBM
- Experience in pre-silicon validation, silicon bring-up, and system-level debugging
- Familiarity with UVM, simulation environments, and automation using Python/Tcl/Perl
- Ability to collaborate with hardware, firmware, and software teams to accelerate AI chip development
\n
\n
\n
\n
\n
\n
\n
\n
\n
\n
- \n
- This is a senior-level role suited for engineers who have worked on advanced AI, networking, data center, GPU, or high-performance computing (HPC) SoCs, where hardware emulation is a critical part of the pre-silicon verification process.
\n