Job Description
Job Description:
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Location: Santa Clara, CA
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Duration: 6 Months contract with high possibility of extension
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Required Skills:
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- Strong experience in ASIC/SoC Physical Design.
- Hands-on experience with Cadence Innovus and/or Synopsys Fusion Compiler.
- STA and timing closure using Synopsys PrimeTime/PrimeTime SI.
- Expertise in Floorplanning, CTS, Place & Route, Routing, and Low-Power Implementation.
- Experience with MMMC, IR-drop, Signal Integrity, and Physical Verification.
- Strong scripting skills in TCL, Perl, and Python.
- Working knowledge of Linux/Unix environments.
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