Job Description
We're hiring: Senior Hardware Design Engineer (Irvine, CA, Hybrid)
\n
\n
Work on technology at the leading edge of non terrestrial communications, a 5G base station built to be deployed on board satellites.
\n
\n
This is deep tech with real world impact: baseband signal processing IP that's already proven in orbit, powering hundreds of operational satellite communications systems worldwide.
\n
\n
What you'll work on:
\n
- \n
- Space qualified devices, delivering standalone and integrated IP solutions
- RTL implementation (Verilog/SystemVerilog) for complex ASIC/FPGA products
- Full design flow collaboration: micro architecture, design, verification, physical implementation and optimization
\n
\n
\n
\n
\n
What we're looking for:
\n
- \n
- Expert level RTL design experience in ASIC and FPGA
- Strong track record in timing and hardware resource optimization
- Experience with EDA tools for simulation and synthesis
- Bonus points for UVM, C++/SystemC, high speed interfaces (PCI E, JESD), or Python
\n
\n
\n
\n
\n
\n
If you want to work on technology that's shaping the future of global connectivity from orbit, not just talk about it, this is a rare seat.
\n
\n
Permanent, hybrid, Irvine, CA.
\n
\n
Interested or know someone who'd be a fit? Send a message or drop a note below.
